| 000 | 00491nam a2200169Ia 4500 | ||
|---|---|---|---|
| 008 | 180531s9999||||xx |||||||||||||| ||und|| | ||
| 020 | _a9788181285867 | ||
| 040 | _cPK-GjGUL | ||
| 082 |
_a621.395 _bMAH-T |
||
| 100 | _a"Maheshwar, Naresh" | ||
| 110 | _aSachin S. Sapatnekar | ||
| 245 |
_aTiming analysis and optimization of sequential circuits _c"Maheshwar, Naresh" |
||
| 260 |
_aDelhi _bSpringer Publishers _c2007 |
||
| 300 | _a190 p. | ||
| 650 | _aElectrical Engineering | ||
| 942 | _cBK | ||
| 999 |
_c15836 _d15836 |
||