Timing analysis and optimization of sequential circuits "Maheshwar, Naresh"
Material type:
TextPublication details: Delhi Springer Publishers 2007Description: 190 pISBN: 9788181285867Subject(s): Electrical EngineeringDDC classification: 621.395
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GIFT University, Library
GIFT University, Library |
621.395 MAH-T (Browse shelf(Opens below)) | Available | 15353 |
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| 621.395 KUO-C CMOS VLSI engineering silicon-on-insulator | 621.395 KUO-C CMOS VLSI engineering silicon-on-insulator | 621.395 KUO-C CMOS VLSI engineering silicon-on-insulator | 621.395 MAH-T Timing analysis and optimization of sequential circuits | 621.395 MAN-D Digital logic and computer design | 621.395 MAN-D Digital design with an introduction to the verilog hdl | 621.395 MAN-D Digital design with an introduction to the verilog hdl |
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